Large digital computer systems with massive control and storage capability require a plurality of cabinets or modules dedicated to functions such as central processing, memory and input/output. In a typical configuration, the cabinets are separated from one another physically and require long cables to provide signal paths from one cabinet to another and also from a source of master clock pulses to each of the cabinets. The length of the cables required for the latter is a function of the physical floor space covered by the system, which in turn, is dictated by design requirements for interconnection, maintenance, and system configurations.
Each of the aforementioned cabinets includes a multiplicity of clocked elements situated on logic cards and activated in synchronism with the elements of the other cards by the signal pulses applied thereto from the master clock. The timing of these signal pulses is very critical and ideally there should be no time difference from one cabinet to the other. More practically, the time difference or clock skew between the clock signal paths from the output of the master clock source to the inputs to the logic cards in the respective cabinets must be limited to less than two or three nanoseconds.
Since these larger computer systems operate at high data rates, for example of the order of 10 mHZ, the long cables for example, 40 feet or more, create severe timing problems. For example, while the nominal delay per foot of twisted pair shielded cable is known, the manufacturing delay tolerance alone may result in an intolerable degree of clock skew between the common master clock source and the respective inputs to the various cabinets. Moreover, significant time delays occur between the respective inputs to the cabinets and the clocked elements contained therein, and these delays are not the same from cabinet to cabinet.
What is needed is a means for conveniently removing the master clock timing errors in a given cabinet. The present system fills such a need.